1. Field of the Invention
The present invention generally relates to a battery protection circuit, and especially to a battery protection circuit that detects an abnormal condition of the battery and turns off a switch connected between the battery and a load.
2. Description of the Related Art
Japanese Patent Application Publication No. 6-303728 discloses a protection circuit that detects current supplied from a battery to a load and disconnects the load from the battery so as to protect the battery when an overcurrent condition is detected.
FIG. 2 is a block diagram illustrating an example of a conventional battery protection system 1.
The conventional battery protection system 1 comprises a battery 11, a battery protection unit 12, and a load 13.
The battery 11 includes a primary battery such as a manganese dioxide battery, an alkaline battery and the like or a secondary (rechargeable) battery such as a nickel-cadmium battery, a lithium ion battery and the like. A positive electrode of the battery 11 is connected to a terminal TB+ of the battery protection unit 12. On the other hand, a negative electrode of the battery 11 is connected to a terminal TB− of the battery protection unit 12.
The battery protection unit 12 comprises a battery protection circuit 21, a switch 22, a reset switch 23, a resistor R11, and capacitors C11 and C12. The battery protection unit 12 detects abnormal conditions such as an overcurrent condition and a short circuit condition in response to a voltage of a terminal TL−. When the abnormal conditions are detected, the switch 22 is turned off so as to protect the battery 11 from the overcurrent condition or the short circuit condition.
The terminal TB+ is connected to the terminal TL+ through the reset switch 23. In addition, the terminal TB+ is connected to the terminal TB− through the resistor R11 and the capacitor C11. Moreover, the terminal TB− is connected to the terminal TL− through the switch 22.
The battery protection circuit 21 includes terminals, Tdd, Tss, Tin, Tout and Tct. The terminal Tdd is connected to a junction point between the resistor R11 and the capacitor C11. Accordingly, a voltage decreased by the resistor R11 and smoothed by the capacitor C11 is applied to the battery protection circuit 21 as a driving voltage VDD.
The terminal Tss is connected to the terminal TB−. The terminal Tin is connected to the terminal TL−. The terminal Tout is connected to a gate of a transistor comprising the switch 22. The terminal Tct is connected to the terminal TB− through the capacitor C12.
The battery protection circuit 21 further includes a resistor R21 for detection, an overcurrent detection circuit 31, a delay circuit 32, a short-circuit detection circuit 33, an output circuit 34, a logic circuit 35, and a switch 36.
As for the resistor R21 for detection, one end thereof is connected to the terminal Tin through the switch 36. While the switch 36 is turned on, the resistor R21 generates a voltage in response to a current flowing from the terminal Tin. The voltage generated by the resistor R21 is supplied to the overcurrent detection circuit 31 and the short-circuit detection circuit 33.
The overcurrent detection circuit 31 comprises a comparator 41 and a reference voltage source 42. The voltage generated by the resistor R21 is supplied to an inverting input terminal of the comparator 41. On the other hand, the first reference voltage from the reference voltage source 42 is applied to a non-inverting input terminal of the comparator 41.
When the voltage of the resistor R21 is greater than the first reference voltage from the reference voltage source 42, the comparator 41 determines that the circuit is in the overcurrent condition and sets the output level to low. On the contrary, when the voltage of the resistor R21 is smaller than the first reference voltage from the reference voltage source 42, the comparator 41 determines that the circuit is in the normal condition and sets the output level to high. The output of the comparator 41 is supplied to the delay circuit 32.
The delay circuit 32 comprises a constant current source 51, a switch 52, a comparator 53, a reference voltage source 54 and a capacitor C21.
The constant current source 51 supplies a constant current to one end of the switch 52. The other end of the switch 52 is connected to the capacitor C21. When the output level of the overcurrent detection circuit 31, i.e., the output level of the comparator 41 is set to low, the switch 52 is turned on. On the contrary, when the output level of the comparator 41 is set to high, the switch 52 is turned off. One end of the capacitor C21 is connected to both a non-inverting input terminal of the comparator 53 and the terminal Tct. The terminal Tct is connected to the terminal TB− through the capacitor C12.
When the switch 52 is turned on, the capacitors C12 and C21 are charged. The charging voltage of the capacitors C12 and C21 is applied to the non-inverting input terminal of the comparator 53. On the other hand, to an inverting input terminal of the comparator 53, the second reference voltage from the reference voltage source 54 is applied.
As the overcurrent condition continues, the charging voltage of the capacitors C12 and C21 becomes greater than the second reference voltage from the reference voltage source 54. Then, the comparator 53 sets the output level to high. The output of the comparator 53 is supplied to the output circuit 34.
The short-circuit detection circuit 33 comprises a comparator 61 and a reference voltage source 62. The voltage generated by the resistor R21 is applied to a non-inverting input terminal of the comparator 61. On the other hand, to an inverting input terminal of the comparator 61, the third reference voltage from the reference voltage source 62 is applied. When a short occurs between the terminals TL+ and TL−, the voltage of the terminal Tin becomes greater than the third reference voltage from the reference voltage source 62. Then, the comparator 61 sets the output level to high. The output of the comparator 61 is supplied to the output circuit 34.
The output circuit 34 comprises a NOR circuit. The NOR circuit outputs a NOR operation result obtained from the output of the delay circuit 32 and the output of the short-circuit detection circuit 33. The output circuit 34 sets the output level to low when the output level of the delay circuit 32 becomes high owing to the continuous overcurrent condition or when the output level of the short-circuit detection circuit 33 becomes high owing to the short-circuit between the terminals TL+ and TL−. To the contrary, the output circuit 34 sets the output level to high when the output level of the delay circuit 32 is low that indicates non-overcurrent condition and when the output level of the short-circuit detection circuit 33 is low that indicates non-short-circuit condition since the short does not occur between the terminals TL+ and TL−.
The output of the output circuit 34 is supplied to the terminal Tout. The output of the terminal Tout is supplied to a gate of an N-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) comprising the switch 22. The switch 22 is turned on when the output level of the output circuit 34 is high in which neither the overcurrent condition nor the short-circuit condition are detected. When the switch 22 is turned on, current is supplied from the battery 11 to the load 13.
Moreover, the switch 22 is turned off when the output level of the output circuit 34 is low in which the overcurrent condition or the short-circuit condition is detected. When the switch 22 is turned off, the terminal TB− is disconnected from the terminal TL− so that the current is prevented from being supplied from the battery 11 to the load 13. Accordingly, the battery 11 and the load 13 are protected from the overcurrent and short-circuit conditions.
The logic circuit 35 connected to the terminals Tdd and Tout switches the switch 36 in response to the output voltages of the terminals Tdd and Tout. The logic circuit 35 turns off the switch 36 when the output voltage of the terminal Tout becomes low because of the overcurrent condition or the short circuit condition. On the other hand, the logic circuit 35 turns on the switch 36 when a driving voltage VDD applied to the terminal Tdd becomes greater than a predetermined voltage. Thus, the overcurrent condition and the short-circuit condition can be detected again.
According to Japanese Laid-Open Patent Application Publication No. 6-303728, in the battery protection system 1, when the switch 22 is turned off for the emergency protection, the reset switch 23 is turned off so as to return the switch 22 to the ON state. One end of the reset switch 23 is connected to a junction point (node) between the terminal TB+ and an end of the resistor R11. The other end of the reset switch 23 is connected to the terminal TL+. When the reset switch 23 is turned off, the load 13 is disconnected from the battery protection circuit 21. Accordingly, the current does not flow through the terminal Tin; and thus, the overcurrent and short-circuit conditions are eliminated. Therefore, the switch 22 is turned on.
In the conventional battery protection circuit, once the switch 22 is turned off owing to the abnormal condition, unless the battery 11 is once released and reconnected while the load 13 is disconnected, the switch 22 remains in the OFF state. Thus, it is impossible to return to a normal driving condition. Accordingly, the reset switch 23 is indispensable. Therefore, there is a problem in which flexibility of design is restricted.